[PATCH] D68203: Add support for (expressing) vscale.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen updated this revision to Diff 236558.
sdesmalen retitled this revision from "[SelectionDAG][SVE] Add ISD node for VSCALE." to "Add support for (expressing) vscale.".
sdesmalen edited the summary of this revision.
sdesmalen added reviewers: efriedma, lattner.
sdesmalen added a subscriber: paulwalker-arm.
sdesmalen added a comment.
Herald added subscribers: jdoerfert, hiraditya.
Herald added a project: LLVM.

Added LLVM IR support to this patch; as intrinsic and constexpr pattern (following suggestions in D71636 <https://reviews.llvm.org/D71636>)


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68203/new/

https://reviews.llvm.org/D68203

Files:
  llvm/docs/LangRef.rst
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/include/llvm/IR/PatternMatch.h
  llvm/include/llvm/Target/TargetSelectionDAG.td
  llvm/lib/Analysis/ConstantFolding.cpp
  llvm/lib/Analysis/ValueTracking.cpp
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve-vscale.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D68203.236558.patch
Type: text/x-patch
Size: 23155 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200107/f91ca6fa/attachment.bin>