[PATCH] D72302: [X86] Improve lowering of v2i64 sign bit tests on pre-sse4.2 targets

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 236508.
craig.topper added a comment.

Just skip the invert case. I don't think its as likely to occur. Other canonicalizations should have prevented it I think.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72302/new/

https://reviews.llvm.org/D72302

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/bitcast-vector-bool.ll
  llvm/test/CodeGen/X86/movmsk-cmp.ll
  llvm/test/CodeGen/X86/sadd_sat_vec.ll
  llvm/test/CodeGen/X86/ssub_sat_vec.ll
  llvm/test/CodeGen/X86/vec_saddo.ll

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