[PATCH] D72270: [ARM,MVE] Fix many signedness errors in MVE intrinsics.

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham created this revision.
simon_tatham added reviewers: dmgreen, miyuki, MarkMurrayARM.
Herald added subscribers: llvm-commits, cfe-commits, hiraditya, kristof.beyls.
Herald added projects: clang, LLVM.

Running an end-to-end test last week I noticed that a lot of the ACLE
intrinsics that operate differently on vectors of signed and unsigned
integers were ending up generating the signed version of the
instruction unconditionally. This is because the IR intrinsics had no
way to distinguish signed from unsigned: the LLVM type system just
calls them both `v8i16` (or whatever), so you need either separate
intrinsics for signed and unsigned, or a flag parameter that tells
ISel which one to choose.

This patch fixes all the problems of that kind that I've noticed, by
adding an i32 flag parameter to many of the IR intrinsics which is set
to 1 for unsigned (matching the existing practice in cases where we
got it right), and conditioning all the isel patterns on that flag. So
the fundamental change is in `IntrinsicsARM.td`, changing the
low-level IR intrinsics API; there are knock-on changes in
`arm_mve.td` (adjusting code gen for the ACLE intrinsics to use the
modified API) and in `ARMInstrMVE.td` (adjusting isel to expect the
new unsigned flags). The rest of this patch is boringly updating tests.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D72270

Files:
  clang/include/clang/Basic/arm_mve.td
  clang/test/CodeGen/arm-mve-intrinsics/vabdq.c
  clang/test/CodeGen/arm-mve-intrinsics/vhaddq.c
  clang/test/CodeGen/arm-mve-intrinsics/vhsubq.c
  clang/test/CodeGen/arm-mve-intrinsics/vmaxnmq.c
  clang/test/CodeGen/arm-mve-intrinsics/vmaxq.c
  clang/test/CodeGen/arm-mve-intrinsics/vminnmq.c
  clang/test/CodeGen/arm-mve-intrinsics/vminq.c
  clang/test/CodeGen/arm-mve-intrinsics/vmulhq.c
  clang/test/CodeGen/arm-mve-intrinsics/vmullbq.c
  clang/test/CodeGen/arm-mve-intrinsics/vmulltq.c
  clang/test/CodeGen/arm-mve-intrinsics/vqaddq.c
  clang/test/CodeGen/arm-mve-intrinsics/vqsubq.c
  clang/test/CodeGen/arm-mve-intrinsics/vrhaddq.c
  clang/test/CodeGen/arm-mve-intrinsics/vrmulhq.c
  llvm/include/llvm/IR/IntrinsicsARM.td
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vabdq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vhaddq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vhsubq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vminq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulhq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vmullbq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulltq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vqaddq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vqsubq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vrhaddq.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vrmulhq.ll

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