[PATCH] D72131: [ARM][LowOverheadLoops] Update liveness info
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 6 01:40:10 PST 2020
samparker updated this revision to Diff 236311.
samparker added a comment.
MachineBasicBlock has now been modified to iterate through the block to look for a return instruction. This then allows LivePhysRegs to add the callee saved regs for blocks where the return isn't the last instruction, such as when we have a POP in an IT block. This currently has the unwanted effect of meaning we can't remove all the instructions from the loop iteration count, see mve-tail-data-types where a callee saved register is used by the moves, but I think this should be resolved in D71837 <https://reviews.llvm.org/D71837>.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D72131/new/
https://reviews.llvm.org/D72131
Files:
llvm/include/llvm/CodeGen/MachineBasicBlock.h
llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update3.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/end-positive-offset.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll
llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-after-dls.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/safe-def-no-mov.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/while.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir
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