[llvm] 32ccafd - [x86] add test for miscompile in XformToShuffleWithZero(); NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2020-01-03T14:49:25-05:00
New Revision: 32ccafd0f253a9c2a3e99d4a6accfdb50263fcec

URL: https://github.com/llvm/llvm-project/commit/32ccafd0f253a9c2a3e99d4a6accfdb50263fcec
DIFF: https://github.com/llvm/llvm-project/commit/32ccafd0f253a9c2a3e99d4a6accfdb50263fcec.diff

LOG: [x86] add test for miscompile in XformToShuffleWithZero(); NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/combine-and.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/combine-and.ll b/llvm/test/CodeGen/X86/combine-and.ll
index 0be32a5bc65e..c3a394873759 100644
--- a/llvm/test/CodeGen/X86/combine-and.ll
+++ b/llvm/test/CodeGen/X86/combine-and.ll
@@ -163,6 +163,18 @@ define <4 x i32> @test14(<4 x i32> %A) {
   ret <4 x i32> %1
 }
 
+; FIXME: X & undef must fold to 0. So lane 0 must choose from the zero vector.
+
+define <4 x i32> @undef_lane(<4 x i32> %x) {
+; CHECK-LABEL: undef_lane:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorps %xmm1, %xmm1
+; CHECK-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
+; CHECK-NEXT:    retq
+  %r = and <4 x i32> %x, <i32 undef, i32 4294967295, i32 0, i32 4294967295>
+  ret <4 x i32> %r
+}
+
 define <4 x i32> @test15(<4 x i32> %A, <4 x i32> %B) {
 ; CHECK-LABEL: test15:
 ; CHECK:       # %bb.0: