[PATCH] D71971: [X86] Potential improvement for v4i32->v4f64 uint_to_fp for AVX1/AVX2 targets.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 2 09:19:53 PST 2020
craig.topper marked an inline comment as done.
craig.topper added inline comments.
================
Comment at: llvm/test/CodeGen/X86/vec_int_to_fp.ll:3721
+; AVX1-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0
+; AVX1-NEXT: vsubpd {{.*}}(%rip), %xmm0, %xmm0
+; AVX1-NEXT: retq
----------------
RKSimon wrote:
> Why does it have separate constant loads for OR/FSUB - do they have to be treated as volatile?
I think something weird happened with the extract_subvector and bitcast propagation. We ended with two different build_vectors, one with integer type and one with fp type. They both became loads of the same constant pool entry
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