[PATCH] D72046: [ELF][RISCV] Resolve undefined weak R_PC relocations to p+a

[Fangrui Song via Phabricator via llvm-commits]

MaskRay created this revision.
MaskRay added reviewers: bsdjhb, jrtc27, ruiu.
Herald added subscribers: llvm-commits, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, arichardson, emaste.
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Herald added a project: LLVM.

Relocations to undefined weak symbols are unspecified. In practice, on
most targets, linkers resolve absolute relocations to 0. Such
relocations can be generated by -fno-pic code to take addresses.

The behaviors of PC-relative relocations have varying behaviors among
targets. We simply assume that compilers cannot generate PC-relative
relocations to undefined symbols and resolve the relocations arbitrarily
to p+a.

R_RISCV_CALL (which should be obsoleted) and R_RISCV_CALL_PLT to
undefined weak symbols, if executed, are considered undefined behaviors.
So we can resolve them arbitrarily. Such relocations resolve to a PLT
entry (preemptible) or p+a like R_PC (non-preemptible).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D72046

Files:
  lld/ELF/InputSection.cpp
  lld/test/ELF/riscv-undefined-weak.s


Index: lld/test/ELF/riscv-undefined-weak.s
===================================================================
--- /dev/null
+++ lld/test/ELF/riscv-undefined-weak.s
@@ -0,0 +1,75 @@
+# REQUIRES: aarch64
+# RUN: llvm-mc -filetype=obj -triple=riscv64 %s -o %t.o
+# RUN: llvm-readobj -r %t.o | FileCheck --check-prefix=RELOC %s
+# RUN: ld.lld -e absolute %t.o -o %t
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefixes=CHECK,PC %s
+# RUN: llvm-readelf -x .data %t | FileCheck --check-prefixes=HEX %s
+# RUN: ld.lld -e absolute %t.o -o %t --export-dynamic
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefixes=CHECK,PLT %s
+# RUN: llvm-readelf -x .data %t | FileCheck --check-prefixes=HEX %s
+
+.weak target
+.global absolute, relative, branch
+
+## Absolute relocations are resolved to 0.
+# RELOC:      0x0 R_RISCV_HI20 target 0x1
+# RELOC-NEXT: 0x4 R_RISCV_LO12_I target 0x1
+
+# CHECK-LABEL: absolute:
+# CHECK-NEXT:  lui t0, 0
+# CHECK-NEXT:  addi t0, t0, 1
+absolute:
+  lui t0, %hi(target+1)
+  addi t0, t0, %lo(target+1)
+
+## PC-relative relocations are resolved to the same address so that
+## they cannot overflow.
+# RELOC-NEXT: 0x8 R_RISCV_PCREL_HI20 target 0x0
+# RELOC-NEXT: 0xC R_RISCV_PCREL_LO12_I .Lpcrel_hi0 0x0
+# RELOC-NEXT: 0x10 R_RISCV_PCREL_HI20 target 0x2
+# RELOC-NEXT: 0x14 R_RISCV_PCREL_LO12_S .Lpcrel_hi1 0x0
+
+# CHECK-LABEL: relative:
+# CHECK-NEXT:  auipc a1, 0
+# CHECK-NEXT:  mv a1, a1
+# CHECK-LABEL: .Lpcrel_hi1:
+# CHECK-NEXT:  auipc t1, 0
+# CHECK-NEXT:  sd a2, 2(t1)
+relative:
+  la a1, target
+  sd a2, target+2, t1
+
+## Branch relocations
+## If .dynsym does not exist, an undefined weak symbol is non-preemptible.
+## Treat them as PC relative relocations.
+# RELOC:      0x18 R_RISCV_CALL target 0x0
+# RELOC-NEXT: 0x20 R_RISCV_JAL target 0x0
+
+# PC-LABEL:    branch:
+# PC-NEXT:     auipc ra, 0
+# PC-NEXT:     jalr ra
+## FIXME: llvm-objdump -d should print the address, instead of the offset.
+# PC-NEXT:     j 0
+
+## If .dynsym exists, an undefined weak symbol is preemptible.
+## We create a PLT entry and redirect the reference to it.
+# PLT-LABEL:   branch:
+# PLT-NEXT:    auipc ra, 0
+# PLT-NEXT:    jalr 56(ra)
+# PLT-NEXT:    j 0
+branch:
+  call target
+  jal x0, target
+
+## Absolute relocations are resolved to 0.
+# RELOC:      0x0 R_RISCV_64 target 0x3
+# RELOC:      0x8 R_RISCV_32 target 0x4
+# HEX:      section '.data':
+# HEX-NEXT: 03000000 00000000 04000000
+.data
+.p2align 3
+.quad target+3
+.long target+4
+
+# PC-NOT:      .plt:
+# PLT:         .plt:
Index: lld/ELF/InputSection.cpp
===================================================================
--- lld/ELF/InputSection.cpp
+++ lld/ELF/InputSection.cpp
@@ -740,8 +740,8 @@
         dest = getARMUndefinedRelativeWeakVA(type, a, p);
       else if (config->emachine == EM_AARCH64)
         dest = getAArch64UndefinedRelativeWeakVA(type, a, p);
-      else if (config->emachine == EM_PPC)
-        dest = p;
+      else if (config->emachine == EM_PPC || config->emachine == EM_RISCV)
+        dest = p + a;
       else
         dest = sym.getVA(a);
     } else {


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