[PATCH] D72080: AMDGPU: Partially directly select llvm.amdgcn.interp.p1.f16

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: nhaehnle, tpr, dstuttard.
Herald added subscribers: hiraditya, t-tye, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

The 16 bank LDS case is complicated due to using multiple
instructions. If I attempt to write a pattern for it, the generated
selector incorrectly places the copy to m0 after the first
instruction, so that needs to be separately addressed.

      

Also fix not gluing the copy to m0 to the second operation in the
second half of the 16 bank lowering.


https://reviews.llvm.org/D72080

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/VOP3Instructions.td
  llvm/test/MC/AMDGPU/vop3.s

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