[PATCH] D71946: [PowerPC][LoopVectorize] Extend getRegisterClassForType to consider double and other floating point type

Jinsong Ji via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 31 14:32:03 PST 2019


jsji marked an inline comment as done.
jsji added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp:597
     return ST->hasVSX() ? VSXRC : VRRC;
-  else if (Ty && Ty->getScalarType()->isFloatTy())
+  else if (Ty && Ty->getScalarType()->isFloatingPointTy())
     return ST->hasVSX() ? VSXRC : FPRRC;
----------------
jsji wrote:
> nemanjai wrote:
> > It seems perfectly reasonable that we want to return VSX/FPR for f32 and f64 types. However, it is not clear to me what we want to do for ppc_fp128, f128, f16, etc.
> > 
> > Don't get me wrong, I think the existing implementation is definitely wrong, I am just wondering if this is a complete solution.
> Yeah, good point. 
> Since `most operations on ppc_f128 values become calls` later,  I don't think it matters much here. 
> While I am not sure whether we really support f16 well on PowerPC right now. 
> 
> So I am preferring just leave it at it is for now.
> But, yes, I am happy to accept any other suggestions. 
OK. I have updated the code to handle f128 and f16, please have a look. Thanks.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71946/new/

https://reviews.llvm.org/D71946





More information about the llvm-commits mailing list