[PATCH] D72038: [PowerPC] Handle constant zero bits in BitPermutationSelector

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, cuviper, PowerPC.
Herald added subscribers: shchenz, jsji, kbarton, hiraditya.
Herald added a project: LLVM.

We currently crash when analyzing an `AssertZExt` node that has some bits that are constant zeros (i.e. as a result of an `and` with a constant).

This issue was reported in https://bugs.llvm.org/show_bug.cgi?id=41088 and this patch fixes that.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D72038

Files:
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/test/CodeGen/PowerPC/pr41088.ll

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