[llvm] a33cab0 - AMDGPU: Adjust test so it will work with GlobalISel

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 27 16:38:10 PST 2019


Author: Matt Arsenault
Date: 2019-12-27T19:37:39-05:00
New Revision: a33cab0f06e38423dbb17ce4d9ea91f93f1f92fb

URL: https://github.com/llvm/llvm-project/commit/a33cab0f06e38423dbb17ce4d9ea91f93f1f92fb
DIFF: https://github.com/llvm/llvm-project/commit/a33cab0f06e38423dbb17ce4d9ea91f93f1f92fb.diff

LOG: AMDGPU: Adjust test so it will work with GlobalISel

This is mostly a workaround for not handling the mubuf store path yet.

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/read_register.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/read_register.ll b/llvm/test/CodeGen/AMDGPU/read_register.ll
index 9a8c468af067..7224a8576dff 100644
--- a/llvm/test/CodeGen/AMDGPU/read_register.ll
+++ b/llvm/test/CodeGen/AMDGPU/read_register.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -enable-var-scope %s
 
 declare i32 @llvm.read_register.i32(metadata) #0
 declare i64 @llvm.read_register.i64(metadata) #0
@@ -6,7 +6,7 @@ declare i64 @llvm.read_register.i64(metadata) #0
 ; CHECK-LABEL: {{^}}test_read_m0:
 ; CHECK: s_mov_b32 m0, -1
 ; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], m0
-; CHECK: buffer_store_dword [[COPY]]
+; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
 define amdgpu_kernel void @test_read_m0(i32 addrspace(1)* %out) #0 {
   store volatile i32 0, i32 addrspace(3)* undef
   %m0 = call i32 @llvm.read_register.i32(metadata !0)
@@ -17,7 +17,7 @@ define amdgpu_kernel void @test_read_m0(i32 addrspace(1)* %out) #0 {
 ; CHECK-LABEL: {{^}}test_read_exec:
 ; CHECK: v_mov_b32_e32 v[[LO:[0-9]+]], exec_lo
 ; CHECK: v_mov_b32_e32 v[[HI:[0-9]+]], exec_hi
-; CHECK: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
+; CHECK: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
 define amdgpu_kernel void @test_read_exec(i64 addrspace(1)* %out) #0 {
   %exec = call i64 @llvm.read_register.i64(metadata !1)
   store i64 %exec, i64 addrspace(1)* %out
@@ -27,7 +27,7 @@ define amdgpu_kernel void @test_read_exec(i64 addrspace(1)* %out) #0 {
 ; CHECK-LABEL: {{^}}test_read_flat_scratch:
 ; CHECK: v_mov_b32_e32 v[[LO:[0-9]+]], flat_scratch_lo
 ; CHECK: v_mov_b32_e32 v[[HI:[0-9]+]], flat_scratch_hi
-; CHECK: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
+; CHECK: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
 define amdgpu_kernel void @test_read_flat_scratch(i64 addrspace(1)* %out) #0 {
   %flat_scratch = call i64 @llvm.read_register.i64(metadata !2)
   store i64 %flat_scratch, i64 addrspace(1)* %out
@@ -36,7 +36,7 @@ define amdgpu_kernel void @test_read_flat_scratch(i64 addrspace(1)* %out) #0 {
 
 ; CHECK-LABEL: {{^}}test_read_flat_scratch_lo:
 ; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], flat_scratch_lo
-; CHECK: buffer_store_dword [[COPY]]
+; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
 define amdgpu_kernel void @test_read_flat_scratch_lo(i32 addrspace(1)* %out) #0 {
   %flat_scratch_lo = call i32 @llvm.read_register.i32(metadata !3)
   store i32 %flat_scratch_lo, i32 addrspace(1)* %out
@@ -45,7 +45,7 @@ define amdgpu_kernel void @test_read_flat_scratch_lo(i32 addrspace(1)* %out) #0
 
 ; CHECK-LABEL: {{^}}test_read_flat_scratch_hi:
 ; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], flat_scratch_hi
-; CHECK: buffer_store_dword [[COPY]]
+; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
 define amdgpu_kernel void @test_read_flat_scratch_hi(i32 addrspace(1)* %out) #0 {
   %flat_scratch_hi = call i32 @llvm.read_register.i32(metadata !4)
   store i32 %flat_scratch_hi, i32 addrspace(1)* %out
@@ -54,7 +54,7 @@ define amdgpu_kernel void @test_read_flat_scratch_hi(i32 addrspace(1)* %out) #0
 
 ; CHECK-LABEL: {{^}}test_read_exec_lo:
 ; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], exec_lo
-; CHECK: buffer_store_dword [[COPY]]
+; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
 define amdgpu_kernel void @test_read_exec_lo(i32 addrspace(1)* %out) #0 {
   %exec_lo = call i32 @llvm.read_register.i32(metadata !5)
   store i32 %exec_lo, i32 addrspace(1)* %out
@@ -63,7 +63,7 @@ define amdgpu_kernel void @test_read_exec_lo(i32 addrspace(1)* %out) #0 {
 
 ; CHECK-LABEL: {{^}}test_read_exec_hi:
 ; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], exec_hi
-; CHECK: buffer_store_dword [[COPY]]
+; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
 define amdgpu_kernel void @test_read_exec_hi(i32 addrspace(1)* %out) #0 {
   %exec_hi = call i32 @llvm.read_register.i32(metadata !6)
   store i32 %exec_hi, i32 addrspace(1)* %out


        


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