[PATCH] D71881: [mlir] Convert std.and/std.or ops to spv.LogicalAnd/spv.LogicalOr
Lei Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 27 06:03:41 PST 2019
antiagainst accepted this revision.
antiagainst added a comment.
This revision is now accepted and ready to land.
Herald added subscribers: shauheen, burmako, jpienaar.
Changes LGTM, thanks!
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71881/new/
https://reviews.llvm.org/D71881
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