[PATCH] D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0

[Zhang Kang via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG6d88b7d6e712: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0 (authored by ZhangKang).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71390/new/

https://reviews.llvm.org/D71390

Files:
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/test/CodeGen/PowerPC/CSR-fit.ll
  llvm/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll
  llvm/test/CodeGen/PowerPC/csr-split.ll
  llvm/test/CodeGen/PowerPC/machine-pre.ll
  llvm/test/CodeGen/PowerPC/not-fixed-frame-object.ll
  llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/pr43527.ll
  llvm/test/CodeGen/PowerPC/pr44183.ll
  llvm/test/CodeGen/PowerPC/sjlj.ll
  llvm/test/CodeGen/PowerPC/sms-phi-1.ll
  llvm/test/CodeGen/PowerPC/sms-phi-3.ll
  llvm/test/CodeGen/PowerPC/tocSaveInPrologue.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

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