[llvm] e351256 - GlobalISel: Define equivalent node for G_INTRINSIC_TRUNC

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2019-12-24T09:53:01-05:00
New Revision: e351256c0d993afc98ca4d82cd05cf0ae03f147c

URL: https://github.com/llvm/llvm-project/commit/e351256c0d993afc98ca4d82cd05cf0ae03f147c
DIFF: https://github.com/llvm/llvm-project/commit/e351256c0d993afc98ca4d82cd05cf0ae03f147c.diff

LOG: GlobalISel: Define equivalent node for G_INTRINSIC_TRUNC

Added: 
    llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir

Modified: 
    llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td

Removed: 
    


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diff  --git a/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td b/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
index b846d2252b8d..ac3c25beb9c8 100644
--- a/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
+++ b/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
@@ -108,6 +108,7 @@ def : GINodeEquiv<G_FSQRT, fsqrt>;
 def : GINodeEquiv<G_FFLOOR, ffloor>;
 def : GINodeEquiv<G_FRINT, frint>;
 def : GINodeEquiv<G_FNEARBYINT, fnearbyint>;
+def : GINodeEquiv<G_INTRINSIC_TRUNC, ftrunc>;
 def : GINodeEquiv<G_FCOPYSIGN, fcopysign>;
 def : GINodeEquiv<G_SMIN, smin>;
 def : GINodeEquiv<G_SMAX, smax>;

diff  --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
new file mode 100644
index 000000000000..22b3ad8e121a
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
@@ -0,0 +1,82 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+
+---
+name: intrinsic_trunc_s32_vv
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $vgpr0
+
+    ; CHECK-LABEL: name: intrinsic_trunc_s32_vv
+    ; CHECK: liveins: $vgpr0
+    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; CHECK: [[V_TRUNC_F32_e64_:%[0-9]+]]:vgpr_32 = V_TRUNC_F32_e64 0, [[COPY]], 0, 0, implicit $exec
+    ; CHECK: $vgpr0 = COPY [[V_TRUNC_F32_e64_]]
+    %0:vgpr(s32) = COPY $vgpr0
+    %1:vgpr(s32) = G_INTRINSIC_TRUNC %0
+    $vgpr0 = COPY %1
+...
+
+---
+name: intrinsic_trunc_s32_vs
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0
+
+    ; CHECK-LABEL: name: intrinsic_trunc_s32_vs
+    ; CHECK: liveins: $sgpr0
+    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+    ; CHECK: [[V_TRUNC_F32_e64_:%[0-9]+]]:vgpr_32 = V_TRUNC_F32_e64 0, [[COPY]], 0, 0, implicit $exec
+    ; CHECK: $vgpr0 = COPY [[V_TRUNC_F32_e64_]]
+    %0:sgpr(s32) = COPY $sgpr0
+    %1:vgpr(s32) = G_INTRINSIC_TRUNC %0
+    $vgpr0 = COPY %1
+...
+
+---
+name: intrinsic_trunc_s64_sv
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+
+    ; CHECK-LABEL: name: intrinsic_trunc_s64_sv
+    ; CHECK: liveins: $sgpr0_sgpr1
+    ; CHECK: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
+    ; CHECK: [[V_TRUNC_F64_e64_:%[0-9]+]]:vreg_64 = V_TRUNC_F64_e64 0, [[COPY]], 0, 0, implicit $exec
+    ; CHECK: $vgpr0_vgpr1 = COPY [[V_TRUNC_F64_e64_]]
+    %0:sgpr(s64) = COPY $sgpr0_sgpr1
+    %1:vgpr(s64) = G_INTRINSIC_TRUNC %0
+    $vgpr0_vgpr1 = COPY %1
+...
+
+---
+name: intrinsic_trunc_s64_vv
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $vgpr0_vgpr1
+
+    ; CHECK-LABEL: name: intrinsic_trunc_s64_vv
+    ; CHECK: liveins: $vgpr0_vgpr1
+    ; CHECK: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+    ; CHECK: [[V_TRUNC_F64_e64_:%[0-9]+]]:vreg_64 = V_TRUNC_F64_e64 0, [[COPY]], 0, 0, implicit $exec
+    ; CHECK: $vgpr0_vgpr1 = COPY [[V_TRUNC_F64_e64_]]
+    %0:vgpr(s64) = COPY $vgpr0_vgpr1
+    %1:vgpr(s64) = G_INTRINSIC_TRUNC %0
+    $vgpr0_vgpr1 = COPY %1
+...