[PATCH] D71581: [X86] Fix an 8 bit testb being selected when folding a volatile i32 load pattern.

Mon Dec 23 23:49:25 PST 2019

craig.topper added inline comments.

================
Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:5104
+        if (auto *LoadN = dyn_cast<LoadSDNode>(N0.getOperand(0).getNode())) {
+          if (LoadN->isVolatile()) {
+            unsigned NumVolBits = LoadN->getValueType(0).getSizeInBits();
----------------
aemerson wrote:
> reames wrote:
> > craig.topper wrote:
> > > @reames should this be !LoadN->isSimple()?
> > Yes.
> > 
> > Though, the approach taken with that hit a snag.  I'm probably going to end up reverting a bunch of changes in that whole sequence as I didn't get legalization quite right and have to revisit the design.  It's off in TOT.  
> I think I'm missing some context here. what patches are you referring to?
These patches and llvm-dev thread.

https://reviews.llvm.org/D69219
https://reviews.llvm.org/D68419
https://reviews.llvm.org/D66309
http://lists.llvm.org/pipermail/llvm-dev/2019-August/134794.html

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71581/new/

https://reviews.llvm.org/D71581