[PATCH] D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0

Zhang Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 23 19:29:42 PST 2019

Previous message: [PATCH] D70097: [SCEV] Add missing cache queries
Next message: [PATCH] D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

ZhangKang added a comment.

I have run the performance for this patch, there is no regression.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71390/new/

https://reviews.llvm.org/D71390

Previous message: [PATCH] D70097: [SCEV] Add missing cache queries
Next message: [PATCH] D71390: [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list