[llvm] f9677c4 - Mips: Make test resistant to future changes

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2019-12-21T04:56:20-05:00
New Revision: f9677c47573f7933dd6ea6fe3086fb58e159969a

URL: https://github.com/llvm/llvm-project/commit/f9677c47573f7933dd6ea6fe3086fb58e159969a
DIFF: https://github.com/llvm/llvm-project/commit/f9677c47573f7933dd6ea6fe3086fb58e159969a.diff

LOG: Mips: Make test resistant to future changes

This seems to have been relying on extra spills being inserted in
these blocks to increase the code size to trigger branch
relaxation. This broke when these spills were avoided. Add some asm to
pad the size of the blocks to make it not matter.

Added: 
    

Modified: 
    llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll b/llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll
index eb9ee7e9d3f0..530c3a7d24d4 100644
--- a/llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll
+++ b/llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll
@@ -38,11 +38,13 @@ entry:
   br i1 %cmp, label %if.then, label %if.end4
 
 if.then:
+  call void asm sideeffect ".space 10", "~{$1}"()
   %1 = load i32, i32* %argc.addr, align 4
   %cmp1 = icmp sgt i32 %1, 3
   br i1 %cmp1, label %if.then2, label %if.end
 
 if.then2:
+  call void asm sideeffect ".space 10", "~{$1}"()
   %call = call i32 bitcast (i32 (...)* @boo to i32 ()*)()
   store i32 %call, i32* %retval, align 4
   br label %return