[PATCH] D71796: AMDGPU/GlobalISel: Fix misuse of div_scale intrinsics

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 21 01:10:13 PST 2019


arsenm created this revision.
arsenm added a reviewer: kerbowa.
Herald added subscribers: Petar.Avramovic, hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

Confusingly, the intrinsic operands do not match the
instruction/custom node. The order is shuffled, and the 3rd operand is
an immediate to select operands.

      

I'm not 100% sure I did this right, but fdiv still doesn't select end
to end and it will be easier to tell when it does. This at least
avoids an assertion in RegBankSelect and allows hitting the fallback
on selection.


https://reviews.llvm.org/D71796

Files:
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D71796.235006.patch
Type: text/x-patch
Size: 90327 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191221/279e6a8c/attachment-0001.bin>


More information about the llvm-commits mailing list