[PATCH] D71672: [AArch64] match splat of bitcasted extract subvector to DUPLANE
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 20 13:04:40 PST 2019
spatel marked 2 inline comments as done.
spatel added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7111
+ unsigned SrcVecNumElts =
+ Extract.getOperand(0).getValueType().getVectorNumElements();
+ if (CastedEltBitWidth > SrcEltBitWidth) {
----------------
efriedma wrote:
> Can we compute SrcVecNumElts as Extract.getOperand(0).getValueType().getSizeInBits()/CastedEltBitWidth, or something like that?
Ah, yes - that will simplify things. I was hung up on scaling that value, but it's unnecessary.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71672/new/
https://reviews.llvm.org/D71672
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