[PATCH] D71690: [SCEV] get a more accurate range for AddRecExpr with nuw flag

[ChenZheng via Phabricator via llvm-commits]

shchenz created this revision.
shchenz added reviewers: nikic, reames, sanjoy.google, fhahn, hfinkel.
Herald added subscribers: llvm-commits, wuzish, hiraditya.
Herald added a project: LLVM.

If `AddRecExpr` with `nuw` flag, we know that the value will never be smaller than its initial value.

This patch makes this behavior more general.

`nsw` will be handled in following patch.


https://reviews.llvm.org/D71690

Files:
  llvm/lib/Analysis/ScalarEvolution.cpp
  llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll


Index: llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll
===================================================================
--- llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll
+++ llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll
@@ -286,7 +286,7 @@
 ; CHECK-NEXT:    store volatile i32 [[IV2]], i32* [[PTR]]
 ; CHECK-NEXT:    br label [[ALWAYS_TAKEN]]
 ; CHECK:       always_taken:
-; CHECK-NEXT:    [[IV2_INC]] = add nuw nsw i32 [[IV2]], 1
+; CHECK-NEXT:    [[IV2_INC]] = add nuw i32 [[IV2]], 1
 ; CHECK-NEXT:    [[IV_INC]] = add nsw i32 [[IV]], 1
 ; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp ne i32 [[IV2_INC]], -2147483628
 ; CHECK-NEXT:    br i1 [[EXITCOND]], label [[FOR_COND]], label [[FOR_END:%.*]]
@@ -329,7 +329,7 @@
 ; CHECK-NEXT:    store volatile i32 [[IV2]], i32* [[PTR]]
 ; CHECK-NEXT:    br label [[ALWAYS_TAKEN]]
 ; CHECK:       always_taken:
-; CHECK-NEXT:    [[IV2_INC]] = add nsw i32 [[IV2]], 1
+; CHECK-NEXT:    [[IV2_INC]] = add i32 [[IV2]], 1
 ; CHECK-NEXT:    [[IV_INC]] = add nsw i32 [[IV]], 1
 ; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp ne i32 [[IV2_INC]], -2147483629
 ; CHECK-NEXT:    br i1 [[EXITCOND]], label [[FOR_COND]], label [[FOR_END:%.*]]
Index: llvm/lib/Analysis/ScalarEvolution.cpp
===================================================================
--- llvm/lib/Analysis/ScalarEvolution.cpp
+++ llvm/lib/Analysis/ScalarEvolution.cpp
@@ -5654,11 +5654,24 @@
   if (const SCEVAddRecExpr *AddRec = dyn_cast<SCEVAddRecExpr>(S)) {
     // If there's no unsigned wrap, the value will never be less than its
     // initial value.
-    if (AddRec->hasNoUnsignedWrap())
-      if (const SCEVConstant *C = dyn_cast<SCEVConstant>(AddRec->getStart()))
-        if (!C->getValue()->isZero())
-          ConservativeResult = ConservativeResult.intersectWith(
-              ConstantRange(C->getAPInt(), APInt(BitWidth, 0)), RangeType);
+    if (AddRec->hasNoUnsignedWrap()) {
+      APInt MinValue = APInt(BitWidth, 0);
+      if (SignHint == ScalarEvolution::HINT_RANGE_UNSIGNED)
+        MinValue = getUnsignedRangeMin(AddRec->getStart());
+      else {
+        ConstantRange StartRange =
+            getRangeRef(AddRec->getStart(), HINT_RANGE_SIGNED)
+                .intersectWith(
+                    ConstantRange(APInt(BitWidth, 0),
+                                  APInt::getSignedMaxValue(BitWidth) + 1),
+                    ConstantRange::Unsigned);
+        if (!StartRange.isEmptySet())
+          MinValue = StartRange.getUnsignedMin();
+      }
+      if (!MinValue.isNullValue())
+        ConservativeResult = ConservativeResult.intersectWith(
+            ConstantRange(MinValue, APInt(BitWidth, 0)), RangeType);
+    }
 
     // If there's no signed wrap, and all the operands have the same sign or
     // zero, the value won't ever change sign.


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