[PATCH] D71589: [PowerPC] Adding a match pattern to recognize the and mask with RLWINM8
qshanz via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 18 23:50:47 PST 2019
steven.zhang marked an inline comment as done.
steven.zhang added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:385
+ uint64_t Mask = (uint64_t)N->getZExtValue();
+ return isUInt<32>(Mask) && isRunOfOnes((unsigned)Mask, mb, me);
+ }
----------------
lkail wrote:
> steven.zhang wrote:
> > shchenz wrote:
> > > we can only return true when mb is not bigger than me. and mask can be 0XF000000F, it becomes to 0XFFFFFFFFF000000F in rlwinm,then we get a 64bit value. This is wrong.
> > Good point. And yes, this is the problem.
> Do we have to check `Mask & 0xffffffff00000000 == 0`?
No, it has been checked by isUInt<32>(Mask). However, I am planing to abandon this patch to post a completely patch that fix all the "and mask" issue llvm powerpc have.
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https://reviews.llvm.org/D71589/new/
https://reviews.llvm.org/D71589
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