[llvm] eb1857c - [AArch64][SVE] Fix gather scatter dag combine test.

[Danilo Carvalho Grael via llvm-commits]

Author: Danilo Carvalho Grael
Date: 2019-12-18T13:44:25-05:00
New Revision: eb1857ce0da481caf82271e6d0c9fc745dfab26f

URL: https://github.com/llvm/llvm-project/commit/eb1857ce0da481caf82271e6d0c9fc745dfab26f
DIFF: https://github.com/llvm/llvm-project/commit/eb1857ce0da481caf82271e6d0c9fc745dfab26f.diff

LOG: [AArch64][SVE] Fix gather scatter dag combine test.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll b/llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
index 7d3aff9357d2..e887aabf2432 100644
--- a/llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
+++ b/llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
@@ -8,11 +8,9 @@ define <vscale x 2 x i64> @no_dag_combine_zext_sext(<vscale x 2 x i1> %pg,
                                                     <vscale x 2 x i8>* %res_out,
                                                     <vscale x 2 x i1> %pred) {
 ; CHECK-LABEL: no_dag_combine_zext_sext
-; CHECK:  	ld1b	{ z1.d }, p0/z, [z0.d, #16]
-; CHECK-NEXT:	mov	w8, #255
-; CHECK-NEXT:	mov	z0.d, x8
-; CHECK-NEXT:	and	z0.d, z1.d, z0.d
-; CHECK-NEXT:	st1b	{ z1.d }, p1, [x0]
+; CHECK:  	ld1b	{ z0.d }, p0/z, [z0.d, #16]
+; CHECK-NEXT:	st1b	{ z0.d }, p1, [x0]
+; CHECK-NEXT:	and	z0.d, z0.d, #0xff
 ; CHECK-NEXT: ret
   %load = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.imm.nxv2i8.nxv2i64(<vscale x 2 x i1> %pg,
                                                                                  <vscale x 2 x i64> %base,
@@ -54,11 +52,9 @@ define <vscale x 2 x i64> @no_dag_combine_zext(<vscale x 2 x i1> %pg,
                                                <vscale x 2 x i8>* %res_out,
                                                <vscale x 2 x i1> %pred) {
 ; CHECK-LABEL: no_dag_combine_zext
-; CHECK:  	ld1b	{ z1.d }, p0/z, [z0.d, #16]
-; CHECK-NEXT:	mov	w8, #255
-; CHECK-NEXT:	mov	z0.d, x8
-; CHECK-NEXT:	and	z0.d, z1.d, z0.d
-; CHECK-NEXT:	st1b	{ z1.d }, p1, [x0]
+; CHECK:  	ld1b	{ z0.d }, p0/z, [z0.d, #16]
+; CHECK-NEXT:	st1b	{ z0.d }, p1, [x0]
+; CHECK-NEXT:	and	z0.d, z0.d, #0xff
 ; CHECK-NEXT:	ret
   %load = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.imm.nxv2i8.nxv2i64(<vscale x 2 x i1> %pg,
                                                                                  <vscale x 2 x i64> %base,