[PATCH] D71515: [AArch64] match fcvtl2 with bitcasted extract

[Sanjay Patel via Phabricator via llvm-commits]

spatel marked 2 inline comments as done.
spatel added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:3043
 
+    case ISD::FP_EXTEND:
+      if (tryHighFPExt(Node))
----------------
efriedma wrote:
> Indentation?
Oops - yes, IDE isn't set to comply with clang's switch bracket setting. Will fix on commit.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71515/new/

https://reviews.llvm.org/D71515