[llvm] a17619e - [AArch64][GlobalISel]: Fix a crash in GlobalIsel in dealing with 16bit uadd.with.overflow.
Mark Lacey via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 17 16:10:30 PST 2019
Author: Xiaoqing Wu
Date: 2019-12-17T16:05:00-08:00
New Revision: a17619e0b0977f922f63522790c82a9644b7a069
URL: https://github.com/llvm/llvm-project/commit/a17619e0b0977f922f63522790c82a9644b7a069
DIFF: https://github.com/llvm/llvm-project/commit/a17619e0b0977f922f63522790c82a9644b7a069.diff
LOG: [AArch64][GlobalISel]: Fix a crash in GlobalIsel in dealing with 16bit uadd.with.overflow.
Summary: AArch64 doesn't support uadd.with.overflow.i16 natively. This change adds a legalization rule to convert the 32bit add result to 16bit. This should fix PR43981.
Reviewers: arsenm, qcolombet, paquette, aemerson
Reviewed By: paquette
Subscribers: wdng, rovka, kristof.beyls, hiraditya, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71587
Added:
llvm/test/CodeGen/AArch64/legalize-uaddo.mir
Modified:
llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
index c7e02eca4933..8d7c2bef6ea3 100644
--- a/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
@@ -143,7 +143,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) {
getActionDefinitionsBuilder({G_SMULH, G_UMULH}).legalFor({s32, s64});
getActionDefinitionsBuilder({G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_UADDO})
- .legalFor({{s32, s1}, {s64, s1}});
+ .legalFor({{s32, s1}, {s64, s1}})
+ .minScalar(0, s32);
getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FNEG})
.legalFor({s32, s64, v2s64, v4s32, v2s32});
diff --git a/llvm/test/CodeGen/AArch64/legalize-uaddo.mir b/llvm/test/CodeGen/AArch64/legalize-uaddo.mir
new file mode 100644
index 000000000000..2268ec664f4f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/legalize-uaddo.mir
@@ -0,0 +1,36 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc %s -run-pass legalizer -march=arm64 -global-isel=1 -verify-machineinstrs -o - | FileCheck %s
+
+...
+---
+name: legalize-uaddo
+alignment: 4
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x0
+
+ ; CHECK-LABEL: name: legalize-uaddo
+ ; CHECK: liveins: $x0
+ ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
+ ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+ ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[AND]], [[C1]]
+ ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C]]
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s32), [[AND1]]
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ICMP]](s32)
+ ; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C2]]
+ ; CHECK: $x0 = COPY [[AND2]](s64)
+ ; CHECK: RET_ReallyLR implicit $x0
+ %0:_(s64) = COPY $x0
+ %4:_(s16) = G_CONSTANT i16 2
+ %1:_(s16) = G_TRUNC %0(s64)
+ %2:_(s16), %3:_(s1) = G_UADDO %1, %4
+ %5:_(s64) = G_ZEXT %3(s1)
+ $x0 = COPY %5(s64)
+ RET_ReallyLR implicit $x0
+
+...
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