[PATCH] D71616: [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, arsenm.
Herald added a project: LLVM.
foad added reviewers: rampitec, arsenm, nhaehnle, dstuttard.
foad added a comment.

The change to `wait.ll` seems unfortunate, because the `exp` instructions are no longer consecutive at the end of the function (there is an `s_waitcnt` between them) but I think it was only working by accident before. All the other test case updates seem innocuous to me, at least the non-autogenerated ones.


The typo has been present since memOpsHaveSameBasePtr was introduced in
r313208.

It caused SIInstrInfo::shouldClusterMemOps to cluster more mem ops than
it was supposed to.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D71616

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/test/CodeGen/AMDGPU/add.i16.ll
  llvm/test/CodeGen/AMDGPU/ctpop.ll
  llvm/test/CodeGen/AMDGPU/ctpop16.ll
  llvm/test/CodeGen/AMDGPU/fadd.f16.ll
  llvm/test/CodeGen/AMDGPU/global_smrd.ll
  llvm/test/CodeGen/AMDGPU/idot2.ll
  llvm/test/CodeGen/AMDGPU/idot4s.ll
  llvm/test/CodeGen/AMDGPU/idot4u.ll
  llvm/test/CodeGen/AMDGPU/idot8s.ll
  llvm/test/CodeGen/AMDGPU/idot8u.ll
  llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
  llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
  llvm/test/CodeGen/AMDGPU/madak.ll
  llvm/test/CodeGen/AMDGPU/max.i16.ll
  llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
  llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
  llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
  llvm/test/CodeGen/AMDGPU/sub.i16.ll
  llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
  llvm/test/CodeGen/AMDGPU/trunc-combine.ll
  llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
  llvm/test/CodeGen/AMDGPU/wait.ll

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