[llvm] 0d8929c - [NFC][Test][PowerPC] Add the test to verify the mask with constant

[QingShan Zhang via llvm-commits]

Author: QingShan Zhang
Date: 2019-12-17T07:04:19Z
New Revision: 0d8929ce76dad4f9e1d19cb979c92bea10ec2747

URL: https://github.com/llvm/llvm-project/commit/0d8929ce76dad4f9e1d19cb979c92bea10ec2747
DIFF: https://github.com/llvm/llvm-project/commit/0d8929ce76dad4f9e1d19cb979c92bea10ec2747.diff

LOG: [NFC][Test][PowerPC] Add the test to verify the mask with constant

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/shift_mask.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/PowerPC/shift_mask.ll b/llvm/test/CodeGen/PowerPC/shift_mask.ll
index 59382c615311..ebd30926ca76 100644
--- a/llvm/test/CodeGen/PowerPC/shift_mask.ll
+++ b/llvm/test/CodeGen/PowerPC/shift_mask.ll
@@ -257,3 +257,25 @@ define <2 x i64> @test213(<2 x i64> %a, <2 x i64> %b) {
   %ashr = ashr <2 x i64> %a, %rem
   ret <2 x i64> %ashr
 }
+
+define i32 @test214(i32 %a) {
+; CHECK-LABEL: test214:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lis 4, 32767
+; CHECK-NEXT:    ori 4, 4, 65535
+; CHECK-NEXT:    sldi 4, 4, 1
+; CHECK-NEXT:    and 3, 3, 4
+; CHECK-NEXT:    blr
+  %and = and i32 %a, -2
+  ret i32 %and
+}
+
+define i64 @test215(i64 %a) {
+; CHECK-LABEL: test215:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    li 4, -7
+; CHECK-NEXT:    and 3, 3, 4
+; CHECK-NEXT:    blr
+  %and = and i64 %a, -7
+  ret i64 %and
+}