[llvm] 204dfab - [NFC][llvm][MIRVRegNamerUtils] Moving some switch cases and altering comments.
Puyan Lotfi via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 16 15:50:58 PST 2019
Author: Puyan Lotfi
Date: 2019-12-16T18:50:26-05:00
New Revision: 204dfabfe68a978620258baaa0bacb55cbd6859d
URL: https://github.com/llvm/llvm-project/commit/204dfabfe68a978620258baaa0bacb55cbd6859d
DIFF: https://github.com/llvm/llvm-project/commit/204dfabfe68a978620258baaa0bacb55cbd6859d.diff
LOG: [NFC][llvm][MIRVRegNamerUtils] Moving some switch cases and altering comments.
Added:
Modified:
llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
index 44670768d1e0..d0670dcc406e 100644
--- a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
+++ b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
@@ -60,14 +60,14 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) {
return hash_combine(
MO.getType(), MO.getTargetFlags(),
MO.getFPImm()->getValueAPF().bitcastToAPInt().getZExtValue());
- case MachineOperand::MO_Immediate:
- return MO.getImm();
- case MachineOperand::MO_TargetIndex:
- return MO.getOffset() | (MO.getTargetFlags() << 16);
case MachineOperand::MO_Register:
if (Register::isVirtualRegister(MO.getReg()))
return MRI.getVRegDef(MO.getReg())->getOpcode();
return MO.getReg();
+ case MachineOperand::MO_Immediate:
+ return MO.getImm();
+ case MachineOperand::MO_TargetIndex:
+ return MO.getOffset() | (MO.getTargetFlags() << 16);
// We could explicitly handle all the types of the MachineOperand,
// here but we can just return a common number until we find a
@@ -75,7 +75,7 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) {
// is contributing to a hash collision but there's enough information
// (Opcodes,other registers etc) that this will likely not be a problem.
- // TODO: Handle the following Immediate/Index/ID/Predicate cases. They can
+ // TODO: Handle the following Index/ID/Predicate cases. They can
// be hashed on in a stable manner.
case MachineOperand::MO_FrameIndex:
case MachineOperand::MO_ConstantPoolIndex:
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