[PATCH] D71401: [AArch64][SVE] Add permutation and selection intrinsics

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen accepted this revision.
sdesmalen added a comment.

LGTM!



================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:1000
+  "",
+  [(set ZPR8:$Zdn, (nxv16i8 (op (nxv16i8 ZPR8:$_Zdn), (nxv16i8 ZPR8:$Zm),
+                                (imm0_255:$imm8))))]>, Sched<[]> {
----------------
nit: this could be a multiclass with pattern to follow the convention in the rest of the file.


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https://reviews.llvm.org/D71401