[PATCH] D71520: [ELF] Rename .plt to .iplt and decrease EM_PPC{,64} alignment of .glink to 4
Peter Smith via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 16 01:45:34 PST 2019
peter.smith accepted this revision.
peter.smith added a comment.
This revision is now accepted and ready to land.
Looks good to me too.
================
Comment at: lld/ELF/SyntheticSections.cpp:2453
name = ".glink";
+ alignment = 4;
}
----------------
MaskRay wrote:
> ruiu wrote:
> > Could you add a comment explaining why PPC is special?
> I think the user will likely also read `PPC64.cpp:writePlt` to understand why its alignment is different. The comment may be redundant. (.glink is a series of bl instructions. Over-aligning to 16 does not improve anything.)
>
> It is not that PPC is special. I think x86/ARM/AArch64 just happen to find 32 is the optimal alignment. Though, I believe on AArch64, at least with -z pac-plt or -z bti, 16 as the alignment is no longer optimal or necessary.
>
>
I think the alignment of 16 comes from the cache line size, this obviously doesn't help when the PLT entry size is > 16. I've not got any data to know if it is worth increasing alignment for larger sequences.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D71520/new/
https://reviews.llvm.org/D71520
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