[PATCH] D71492: [SCEV] Generate AddRec for trivial and LCSSA phis outside of loop header.

[Bardia Mahjour via Phabricator via llvm-commits]

bmahjour created this revision.
bmahjour added reviewers: reames, fhahn, Meinersbur, etiotto, kbarton.
bmahjour added a project: LLVM.
Herald added subscribers: javed.absar, hiraditya.

The current implementation of createAddRecFromPHI() returns immediately if the phi is not in the loop header. This causes some trivial phi nodes to be represented as SCEVUnknown instead of a proper recurrence. This patch improves the result of SCEV for such cases. 
For example consider:

  define i64 @test1(i32 signext %n, float* %A) {
  entry:
    %0 = sext i32 %n to i64
    br label %do.body
  
  do.body:                                          ; preds = %do.body, %entry
    %indvars.iv = phi i64 [ %indvars.iv.next, %do.body ], [ 0, %entry ]
    %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv
    store float 1.000000e+00, float* %arrayidx, align 4
    %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
    %cmp = icmp slt i64 %indvars.iv.next, %0
    br i1 %cmp, label %do.body, label %do.end
  
  do.end:                                           ; preds = %do.body
    %add.lcssa.wide = phi i64 [ %indvars.iv.next, %do.body ]
    ret i64 %add.lcssa.wide
  }

The SCEV for %add.lcssa.wide is:

`--> %add.lcssa.wide U: [1,2147483648) S: [1,2147483648)`

This patch makes it generate the following instead:

`--> {1,+,1}<nuw><nsw><%do.body> U: [1,2147483648) S: [1,2147483648) --> (1 smax (sext i32 %n to i64)) U: [1,2147483648) S: [1,2147483648)`


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D71492

Files:
  llvm/lib/Analysis/ScalarEvolution.cpp
  llvm/test/Analysis/ScalarEvolution/solve-quadratic-i1.ll
  llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll
  llvm/test/Analysis/ScalarEvolution/trivial-phis.ll
  llvm/test/Transforms/IndVarSimplify/lftr-pr20680.ll

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