[llvm] a0f43b0 - [RISCV] Move DebugLoc Copy into CompressInstEmitter
Sam Elliott via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 13 12:01:17 PST 2019
Author: Sam Elliott
Date: 2019-12-13T20:01:04Z
New Revision: a0f43b0043581b37b10d105a85f0653704d3657b
URL: https://github.com/llvm/llvm-project/commit/a0f43b0043581b37b10d105a85f0653704d3657b
DIFF: https://github.com/llvm/llvm-project/commit/a0f43b0043581b37b10d105a85f0653704d3657b.diff
LOG: [RISCV] Move DebugLoc Copy into CompressInstEmitter
Summary:
This copy ensures that debug location information is kept for
compressed instructions. There are places where both compressInstruction and
uncompressInstruction are called that were not doing this copy, discarding some
debug info.
This change merely moves the copy into the generated file, so you cannot forget
to copy the location over when compressing or uncompressing.
Reviewers: asb, luismarques
Reviewed By: luismarques
Subscribers: sameer.abuasal, aprantl, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67493
Added:
llvm/test/MC/RISCV/compress-debug-info.s
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index baf78f84a04d..f7fb4870914e 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -1610,7 +1610,6 @@ bool RISCVAsmParser::parseDirectiveOption() {
void RISCVAsmParser::emitToStreamer(MCStreamer &S, const MCInst &Inst) {
MCInst CInst;
bool Res = compressInst(CInst, Inst, getSTI(), S.getContext());
- CInst.setLoc(Inst.getLoc());
S.EmitInstruction((Res ? CInst : Inst), getSTI());
}
diff --git a/llvm/test/MC/RISCV/compress-debug-info.s b/llvm/test/MC/RISCV/compress-debug-info.s
new file mode 100644
index 000000000000..b7ad2ff3e2a6
--- /dev/null
+++ b/llvm/test/MC/RISCV/compress-debug-info.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple riscv32 -mattr=+c %s -g -o - -riscv-no-aliases \
+# RUN: | FileCheck %s -check-prefixes=COMPRESS,BOTH
+# RUN: llvm-mc -triple riscv32 %s -g -o - -riscv-no-aliases \
+# RUN: | FileCheck %s -check-prefixes=UNCOMPRESS,BOTH
+
+
+# This file ensures that compressing an instruction preserves its debug info.
+
+
+# BOTH-LABEL: .text
+
+# BOTH: .file 1
+# BOTH-SAME: "compress-debug-info.s"
+
+# BOTH: .loc 1 [[# @LINE + 3 ]] 0
+# UNCOMPRESS-NEXT: addi a0, a1, 0
+# COMPRESS-NEXT: c.mv a0, a1
+addi a0, a1, 0
+
+# BOTH-LABEL: .debug_info
diff --git a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
index 2f1d3898f182..85ad38c333a7 100644
--- a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
@@ -728,6 +728,7 @@ void RISCVCompressInstEmitter::emitCompressInstEmitter(raw_ostream &o,
}
++OpNo;
}
+ CodeStream.indent(6) << "OutInst.setLoc(MI.getLoc());\n";
CaseStream << mergeCondAndCode(CondStream, CodeStream);
PrevOp = CurOp;
}
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