[PATCH] D71074: [Aarch64][SVE] Add intrinsics for scatter stores
Andrzej Warzynski via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 13 08:51:59 PST 2019
andwar added a subscriber: kmclaughlin.
andwar added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1072
+ LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
+ llvm_anyvector_ty, llvm_i64_ty
+ ],
----------------
efriedma wrote:
> ImmArg?
Sorry, you mentioned that earlier and I missed that. I've updated this patch accordingly.
I also had to make sure that the affected instruction multiclasses in _AArch64SVEInstrInfo.td_ use `TImmLeaf` instead of `ImmLeaf` (this came up in other patches similar to this one). To this end, I duplicated the following definitions that use `ImmLeaf`:
* `imm0_31`
* `uimm5s2`
* `uimm5s4`
* `uimm5s8`
and defined equivalents using `TImmLeaf`:
* `timm0_31`
* `tuimm5s2`
* `tuimm5s4`
* `tuimm5s8`
We may implement this later with a `ComplexPattern`, instead of duplicating these. I think that @kmclaughlin might already be looking into it.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D71074/new/
https://reviews.llvm.org/D71074
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