[PATCH] D71432: [AArch64][SVE] Proposal to use op+select to match scalable predicated operations

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Adding patterns for vselect of various operations seems reasonable in general.  The patterns are simple enough that it's not a big deal to repeat for a bunch of instructions.

For floating-point ops in particular, I'm sort of wondering how this interacts with STRICT_* operations. I think these patterns should not match in that case? We'd be suppressing exceptions that would otherwise trigger.  Not sure how important that is.



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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:1284
+  def : Pat<(vselect (nxv8i1 PPR:$Pg), (nxv8f16 (op ZPR:$Zds, ZPR:$Zn)), ZPR:$Zds),
+         (!cast<Instruction>(NAME # _H) PPR:$Pg, ZPR:$Zds, ZPR:$Zn)>;
+  def : Pat<(vselect (nxv4i1 PPR:$Pg), (nxv4f32 (op ZPR:$Zds, ZPR:$Zn)), ZPR:$Zds),
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If we're going to stick this style of pattern all over the place, we probably want a "class" for it.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71432/new/

https://reviews.llvm.org/D71432