[PATCH] D69559: [AArch64] Improve codegen of volatile load/store of i128

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3017
+        DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i64, StoreNode->getValue(),
+                    DAG.getConstant(0, Dl, MVT::i64));
+    SDValue Hi =
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efriedma wrote:
> Not sure we're actually guaranteed here that `StoreNode->getValue()` is an i128.
Actually, we're probably fine here if it's a volatile store.  Maybe worth adding an assert, though.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69559/new/

https://reviews.llvm.org/D69559