[PATCH] D71370: [AArch64][SVE] Add integer arithmetic with immediate instructions.

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2821
+  if (auto CNode = dyn_cast<ConstantSDNode>(N)) {
+    const int64_t ImmVal = CNode->getSExtValue();
+    SDLoc DL(N);
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can this be `getZExtValue` now `i16` is being handled the same as `i32` and `i64`?


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:296
 
+class SVE_1Op_Imm_OptLsl_Pat<ValueType vt, SDPatternOperator op, ZPRRegOp zprty, 
+                      ComplexPattern cpx, Instruction inst>
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`SVE_1_Op_Imm_OptLsl_Pat`


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:297
+class SVE_1Op_Imm_OptLsl_Pat<ValueType vt, SDPatternOperator op, ZPRRegOp zprty, 
+                      ComplexPattern cpx, Instruction inst>
+  : Pat<(vt (op (vt zprty:$Op1), (i32 (cpx i32:$imm, i32:$shift)))),
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nit: formatting


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Comment at: llvm/test/CodeGen/AArch64/sve-int-imm.ll:8
+  %res =  call <vscale x 16 x i8> @llvm.aarch64.sve.add.imm.nxv16i8(<vscale x 16 x i8> %a,
+                                                                     i32 30)
+  ret <vscale x 16 x i8> %res
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nit: imm arg isn't directly under first arg, and below.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71370/new/

https://reviews.llvm.org/D71370