[PATCH] D71399: Mips: Make test resistant to future changes
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 12 01:12:25 PST 2019
arsenm created this revision.
arsenm added reviewers: abeserminji, atanasyan.
Herald added subscribers: arichardson, wdng, sdardis.
Herald added a project: LLVM.
This seems to have been relying on extra spills being inserted in
these blocks to increase the code size to trigger branch
relaxation. This broke when these spills were avoided. Add some asm to
pad the size of the blocks to make it not matter.
https://reviews.llvm.org/D71399
Files:
llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll
Index: llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll
===================================================================
--- llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll
+++ llvm/test/CodeGen/Mips/branch-relaxation-with-hazard.ll
@@ -38,11 +38,13 @@
br i1 %cmp, label %if.then, label %if.end4
if.then:
+ call void asm sideeffect ".space 10", "~{$1}"()
%1 = load i32, i32* %argc.addr, align 4
%cmp1 = icmp sgt i32 %1, 3
br i1 %cmp1, label %if.then2, label %if.end
if.then2:
+ call void asm sideeffect ".space 10", "~{$1}"()
%call = call i32 bitcast (i32 (...)* @boo to i32 ()*)()
store i32 %call, i32* %retval, align 4
br label %return
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