[PATCH] D71367: [AMDGPU] Fold 64 bit immediates

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec marked an inline comment as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2954-2958
+  if (MO.isImm()) {
+    int64_t Imm = MO.getImm();
+    if (!isInt<32>(Imm) && !isUInt<32>(Imm))
+      return false;
+  }
----------------
arsenm wrote:
> I think this is more complicated and depends on the context instruction, which is why this was never done. I think some instructions zero-extend the 32-bit constants (including FP), and then maybe some sign extend
Do you have an example? As far as I understand HW logic is quite primitive and doesn't distinguish, so it is always sign extended. At least this has passed PSDB and was used specifically in the fp context.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71367/new/

https://reviews.llvm.org/D71367