[llvm] 83e1bd3 - [AArch64][x86] add tests for possible infinite loops in DAGCombiner; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2019-12-11T19:41:42-05:00
New Revision: 83e1bd36be988ffce4732f400ff6f06442c34011

URL: https://github.com/llvm/llvm-project/commit/83e1bd36be988ffce4732f400ff6f06442c34011
DIFF: https://github.com/llvm/llvm-project/commit/83e1bd36be988ffce4732f400ff6f06442c34011.diff

LOG: [AArch64][x86] add tests for possible infinite loops in DAGCombiner; NFC

This is a reduction of a test that failed (infinite looped)
with rGd1f0bdf2d2df (subsequently reverted). I've duplicated
it for 2 targets to increase coverage - everything down here
is wobbly.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/arm64-fp.ll
    llvm/test/CodeGen/X86/neg_fp.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/arm64-fp.ll b/llvm/test/CodeGen/AArch64/arm64-fp.ll
index 1c88b3d9009a..683177a8d481 100644
--- a/llvm/test/CodeGen/AArch64/arm64-fp.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-fp.ll
@@ -1,8 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
 
 define float @t1(i1 %a, float %b, float %c) nounwind {
-; CHECK: t1
-; CHECK: fcsel	s0, s0, s1, ne
+; CHECK-LABEL: t1:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    tst w0, #0x1
+; CHECK-NEXT:    fcsel s0, s0, s1, ne
+; CHECK-NEXT:    ret
   %sel = select i1 %a, float %b, float %c
   ret float %sel
 }
+
+; This may infinite loop if isNegatibleForFree and getNegatedExpression are conflicted.
+
+define double @negation_propagation(double* %arg, double %arg1, double %arg2) {
+; CHECK-LABEL: negation_propagation:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fmov d2, #1.00000000
+; CHECK-NEXT:    fdiv d0, d2, d0
+; CHECK-NEXT:    fmul d2, d0, d0
+; CHECK-NEXT:    fmul d1, d0, d1
+; CHECK-NEXT:    fmul d0, d0, d2
+; CHECK-NEXT:    fsub d0, d1, d0
+; CHECK-NEXT:    ret
+  %t = fdiv double 1.0, %arg1
+  %t7 = fmul double %t, %arg2
+  %t10 = fneg double %t7
+  %t11 = fmul double %t, %t
+  %t13 = fsub double %t11, %t
+  %t14 = fneg double %t
+  %t15 = fmul double %t, %t14
+  %t16 = fmul double %t, %t15
+  %t18 = fadd double %t16, %t7
+  ret double %t18
+}

diff  --git a/llvm/test/CodeGen/X86/neg_fp.ll b/llvm/test/CodeGen/X86/neg_fp.ll
index b81c195735e0..3c04aafcea4d 100644
--- a/llvm/test/CodeGen/X86/neg_fp.ll
+++ b/llvm/test/CodeGen/X86/neg_fp.ll
@@ -4,21 +4,53 @@
 ; Test that when we don't -enable-unsafe-fp-math, we don't do the optimization
 ; -0 - (A - B) to (B - A) because A==B, -0 != 0
 
-define float @negfp(float %a, float %b) {
+define float @negfp(float %a, float %b) nounwind {
 ; CHECK-LABEL: negfp:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushl %eax
-; CHECK-NEXT:    .cfi_def_cfa_offset 8
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
 ; CHECK-NEXT:    subss {{[0-9]+}}(%esp), %xmm0
 ; CHECK-NEXT:    xorps {{\.LCPI.*}}, %xmm0
 ; CHECK-NEXT:    movss %xmm0, (%esp)
 ; CHECK-NEXT:    flds (%esp)
 ; CHECK-NEXT:    popl %eax
-; CHECK-NEXT:    .cfi_def_cfa_offset 4
 ; CHECK-NEXT:    retl
 entry:
 	%sub = fsub float %a, %b		; <float> [#uses=1]
 	%neg = fsub float -0.000000e+00, %sub		; <float> [#uses=1]
 	ret float %neg
 }
+
+; This may infinite loop if isNegatibleForFree and getNegatedExpression are conflicted.
+
+define double @negation_propagation(double* %arg, double %arg1, double %arg2) nounwind {
+; CHECK-LABEL: negation_propagation:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    pushl %ebp
+; CHECK-NEXT:    movl %esp, %ebp
+; CHECK-NEXT:    andl $-8, %esp
+; CHECK-NEXT:    subl $8, %esp
+; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT:    divsd 12(%ebp), %xmm0
+; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
+; CHECK-NEXT:    mulsd %xmm0, %xmm1
+; CHECK-NEXT:    movapd %xmm0, %xmm2
+; CHECK-NEXT:    mulsd %xmm0, %xmm2
+; CHECK-NEXT:    mulsd %xmm0, %xmm2
+; CHECK-NEXT:    subsd %xmm2, %xmm1
+; CHECK-NEXT:    movsd %xmm1, (%esp)
+; CHECK-NEXT:    fldl (%esp)
+; CHECK-NEXT:    movl %ebp, %esp
+; CHECK-NEXT:    popl %ebp
+; CHECK-NEXT:    retl
+  %t = fdiv double 1.0, %arg1
+  %t7 = fmul double %t, %arg2
+  %t10 = fneg double %t7
+  %t11 = fmul double %t, %t
+  %t13 = fsub double %t11, %t
+  %t14 = fneg double %t
+  %t15 = fmul double %t, %t14
+  %t16 = fmul double %t, %t15
+  %t18 = fadd double %t16, %t7
+  ret double %t18
+}