[PATCH] D71215: [AArch64][SVE] Add patterns for unpredicated load/store to frame-indices.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen updated this revision to Diff 233449.
sdesmalen marked 8 inline comments as done.
sdesmalen added a comment.

- Added convenience function `MemoryLocation::getSizeOrUnknown`
- Removed isLE predicate from predicate store patterns.
- Added comments explaining why we bail out of a function when the type is a scalable vector.
- Addressed other suggestions to clean up code.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71215/new/

https://reviews.llvm.org/D71215

Files:
  llvm/include/llvm/Analysis/MemoryLocation.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/Analysis/Loads.cpp
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
  llvm/test/CodeGen/AArch64/spillfill-sve.ll

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