[PATCH] D71298: [AArch64][SVE] Add patterns for scalable vselect

[Cameron McInally via Phabricator via llvm-commits]

cameron.mcinally marked 3 inline comments as done.
cameron.mcinally added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-select.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+;
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c-rhodes wrote:
> Can this be removed? (I'm not sure if this test was generated?)
These were automatically generated...


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Comment at: llvm/test/CodeGen/AArch64/sve-select.ll:8-11
+; CHECK-LABEL: sel_nxv16i8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov z0.b, p0/m, z1.b
+; CHECK-NEXT:    ret
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c-rhodes wrote:
> nit: can the `CHECK` lines be shifted down a couple of lines to the function body? It would be a little easier to read.
And, yeah, I thought that was weird too. That's what `update_llc_test_checks` produced. I also see it in some other generated tests as well.


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Comment at: llvm/test/CodeGen/AArch64/sve-select.ll:20
+; CHECK-LABEL: sel_nxv8i16:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov z0.h, p0/m, z1.h
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sdesmalen wrote:
> nit: the check for the basic-block seems unnecessary.
I can hand edit these if everyone wants that.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D71298/new/

https://reviews.llvm.org/D71298