[PATCH] D71361: [ARM][THUMB2] Allow emitting T3 types of add and sub

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: llvm/lib/Target/ARM/Thumb2InstrInfo.cpp:320
+
+    assert((DestReg == ARM::SP ? DestReg == BaseReg : true) &&
+           "Writing to SP, from other register.");
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Move this assertion before the T1 check?

Maybe also easier to read as "DestReg != ARM::SP || BaseReg == ARM::SP"


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Comment at: llvm/test/CodeGen/Thumb2/mve-stacksplot.mir:121
     ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -36
-    ; CHECK-NEXT: $sp = frame-setup t2SUBri killed $sp, 1216, 14, $noreg, $noreg
-    ; CHECK-NEXT: $sp = frame-setup tSUBspi $sp, 1, 14, $noreg
+    ; CHECK-NEXT: $sp = frame-setup t2SUBri12 killed $sp, 1220, 14, $noreg
     ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 1256
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I'd prefer a dedicated test; this only exercises the codepath by accident.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71361/new/

https://reviews.llvm.org/D71361