[PATCH] D70635: Reland [AArch64][MachineOutliner] Return address signing for outlined functions

[David Tellenbach via Phabricator via llvm-commits]

tellenbach updated this revision to Diff 233392.
tellenbach added a comment.
This revision is now accepted and ready to land.

`hasIllegalSPModification` now only accepts matching `sp` modifying add and sub instructions of if they just increment/decrement `sp`.

  PACIASP
  ...
  $sp = ADDXri $sp, 16, 0    // Incrementing sp modification
  ...
  $sp = SUBXri $sp, 16, 0    // Matching decrementing sp modification
  ...
  AUTIASP
  RET

or

  PACIASP
  ...
  $sp = ADDXri $sp, 0, 0   // Incrementing sp modification (sp is unchanged)
  ...
  AUTIASP
  RET

are okay but e.g. `$sp = ADDXri $x8, 0, 0`  is illegal.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70635/new/

https://reviews.llvm.org/D70635

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
  llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll

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