[PATCH] D71028: [Mips] Add support for min/max/umin/umax atomics

Mirko Brkusanin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 11 07:22:22 PST 2019


mbrkusanin updated this revision to Diff 233363.
mbrkusanin added a comment.

Sorry @atanasyan, you already reviewed this, but for Mips64 tests would fail with -verify-machineinstrs option. Apparently both 'SLT' and 'SLT64' use GPR32 for result. It's been corrected now and there should be no issues for EXPENSIVE_CHECKS builds. Can you take a quick look at new changes? Thanks.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71028/new/

https://reviews.llvm.org/D71028

Files:
  llvm/lib/Target/Mips/Mips64InstrInfo.td
  llvm/lib/Target/Mips/MipsExpandPseudo.cpp
  llvm/lib/Target/Mips/MipsISelLowering.cpp
  llvm/lib/Target/Mips/MipsInstrInfo.td
  llvm/lib/Target/Mips/MipsScheduleGeneric.td
  llvm/lib/Target/Mips/MipsScheduleP5600.td
  llvm/test/CodeGen/Mips/atomic-min-max-64.ll
  llvm/test/CodeGen/Mips/atomic-min-max.ll
  llvm/test/CodeGen/Mips/atomic.ll

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