[llvm] 1eecbda - [AArch64][SVE] Move TableGen class definitions for gather loads (NFC)

[Andrzej Warzynski via llvm-commits]

Author: Andrzej Warzynski
Date: 2019-12-11T09:48:48Z
New Revision: 1eecbda0872832da936d37c4288eaaa2645a7415

URL: https://github.com/llvm/llvm-project/commit/1eecbda0872832da936d37c4288eaaa2645a7415
DIFF: https://github.com/llvm/llvm-project/commit/1eecbda0872832da936d37c4288eaaa2645a7415.diff

LOG: [AArch64][SVE] Move TableGen class definitions for gather loads (NFC)

Move 2 intrinsic class definitions so that they're all clustered in
one place.

Patch submitted to test commit access.

Added: 
    

Modified: 
    llvm/include/llvm/IR/IntrinsicsAArch64.td

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/IR/IntrinsicsAArch64.td b/llvm/include/llvm/IR/IntrinsicsAArch64.td
index 9ece6c548d92..1cd39d6e351c 100644
--- a/llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ b/llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -959,15 +959,6 @@ let TargetPrefix = "aarch64" in {  // All intrinsics start with "llvm.aarch64.".
                  llvm_i32_ty],
                 [IntrNoMem]>;
 
-class AdvSIMD_GatherLoad_64bitOffset_Intrinsic
-    : Intrinsic<[llvm_anyvector_ty],
-                [
-                  LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
-                  LLVMPointerToElt<0>,
-                  LLVMScalarOrSameVectorWidth<0, llvm_i64_ty>
-                ],
-                [IntrReadMem, IntrArgMemOnly]>;
-
   class SVE2_3VectorArg_Long_Intrinsic
     : Intrinsic<[llvm_anyvector_ty],
                 [LLVMMatchType<0>,
@@ -987,14 +978,6 @@ class AdvSIMD_GatherLoad_64bitOffset_Intrinsic
   // to reuse currently identical class definitions.
   class AdvSIMD_SVE_LOGB_Intrinsic  : AdvSIMD_SVE_CNT_Intrinsic;
 
-class AdvSIMD_GatherLoad_32bitOffset_Intrinsic
-    : Intrinsic<[ llvm_anyvector_ty ],
-                [
-                  LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
-                  LLVMPointerToElt<0>, llvm_anyvector_ty
-                ],
-                [ IntrReadMem, IntrArgMemOnly ]>;
-
   // This class of intrinsics are not intended to be useful within LLVM IR but
   // are instead here to support some of the more regid parts of the ACLE.
   class Builtin_SVCVT<string name, LLVMType OUT, LLVMType IN>
@@ -1024,6 +1007,23 @@ class AdvSIMD_SVE_WHILE_Intrinsic
                 [llvm_anyint_ty, LLVMMatchType<1>],
                 [IntrNoMem]>;
 
+class AdvSIMD_GatherLoad_64bitOffset_Intrinsic
+    : Intrinsic<[llvm_anyvector_ty],
+                [
+                  LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
+                  LLVMPointerToElt<0>,
+                  LLVMScalarOrSameVectorWidth<0, llvm_i64_ty>
+                ],
+                [IntrReadMem, IntrArgMemOnly]>;
+
+class AdvSIMD_GatherLoad_32bitOffset_Intrinsic
+    : Intrinsic<[llvm_anyvector_ty],
+                [
+                  LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
+                  LLVMPointerToElt<0>, llvm_anyvector_ty
+                ],
+                [IntrReadMem, IntrArgMemOnly]>;
+
 class AdvSIMD_GatherLoad_VecTorBase_Intrinsic
     : Intrinsic<[llvm_anyvector_ty],
                 [