[PATCH] D71252: [AArch64][SVE] Add intrnisics for saturating scalar arithmetic

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:833
+                 llvm_i32_ty],
+                [IntrNoMem]>;
+
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Missing ImmArg markings?


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:700
+  def : Pat<(i32 (op GPR32:$Rn, (sve_pred_enum:$pattern), (sve_incdec_imm:$imm4))),
+            (EXTRACT_SUBREG (!cast<Instruction>(NAME) (INSERT_SUBREG (IMPLICIT_DEF), $Rn, sub_32), sve_pred_enum:$pattern, sve_incdec_imm:$imm4), sub_32)>;
 }
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SQDECB always returns a value in a 64-bit register; why are you treating the return value as 32 bits? Even if there's some reason to prefer that form at the IR level, it doesn't seem like a good idea in isel; if you need a sign-extended value, you'll be forced to emit a redundant sign extension.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71252/new/

https://reviews.llvm.org/D71252