[llvm] 933de40 - [TypePromotion] Query target register width

[Sam Parker via llvm-commits]

Author: Sam Parker
Date: 2019-12-10T13:23:00Z
New Revision: 933de40729128be04f1dc24ce12be128ad2eb70c

URL: https://github.com/llvm/llvm-project/commit/933de40729128be04f1dc24ce12be128ad2eb70c
DIFF: https://github.com/llvm/llvm-project/commit/933de40729128be04f1dc24ce12be128ad2eb70c.diff

LOG: [TypePromotion] Query target register width

TargetLoweringInfo may report that an integer should be promoted, but
it maybe provide a size that isn't natively supported by the target
register file... So check this before trying to perform a promotion.

This is to fix some chromium issues:
https://bugs.chromium.org/p/chromium/issues/detail?id=1031978
https://bugs.chromium.org/p/chromium/issues/detail?id=1031979

Differential Revision: https://reviews.llvm.org/D71200

Added: 
    

Modified: 
    llvm/lib/CodeGen/TypePromotion.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/TypePromotion.cpp b/llvm/lib/CodeGen/TypePromotion.cpp
index 94fe7d2c7030..d78589c4a056 100644
--- a/llvm/lib/CodeGen/TypePromotion.cpp
+++ b/llvm/lib/CodeGen/TypePromotion.cpp
@@ -17,6 +17,7 @@
 
 #include "llvm/ADT/SetVector.h"
 #include "llvm/ADT/StringRef.h"
+#include "llvm/Analysis/TargetTransformInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetLowering.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
@@ -158,6 +159,7 @@ class TypePromotion : public FunctionPass {
   TypePromotion() : FunctionPass(ID) {}
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.addRequired<TargetTransformInfoWrapperPass>();
     AU.addRequired<TargetPassConfig>();
   }
 
@@ -681,8 +683,9 @@ void IRPromoter::Mutate(Type *OrigTy, unsigned PromotedWidth,
                         SmallPtrSetImpl<Instruction*> &Sinks,
                         SmallPtrSetImpl<Instruction*> &SafeToPromote,
                         SmallPtrSetImpl<Instruction*> &SafeWrap) {
-  LLVM_DEBUG(dbgs() << "IR Promotion: Promoting use-def chains to from "
-             << TypePromotion::TypeSize << " to 32-bits\n");
+  LLVM_DEBUG(dbgs() << "IR Promotion: Promoting use-def chains from "
+             << TypePromotion::TypeSize << " to " << PromotedWidth
+             << "-bits\n");
 
   assert(isa<IntegerType>(OrigTy) && "expected integer type");
   this->OrigTy = cast<IntegerType>(OrigTy);
@@ -936,6 +939,8 @@ bool TypePromotion::runOnFunction(Function &F) {
   const TargetMachine &TM = TPC->getTM<TargetMachine>();
   const TargetSubtargetInfo *SubtargetInfo = TM.getSubtargetImpl(F);
   const TargetLowering *TLI = SubtargetInfo->getTargetLowering();
+  const TargetTransformInfo &TII =
+    getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
 
   // Search up from icmps to try to promote their operands.
   for (BasicBlock &BB : F) {
@@ -966,6 +971,12 @@ bool TypePromotion::runOnFunction(Function &F) {
             break;
 
           EVT PromotedVT = TLI->getTypeToTransformTo(ICmp->getContext(), SrcVT);
+          if (TII.getRegisterBitWidth(false) < PromotedVT.getSizeInBits()) {
+            LLVM_DEBUG(dbgs() << "IR Promotion: Couldn't find target register "
+                       << "for promoted type\n");
+            break;
+          }
+
           MadeChange |= TryToPromote(I, PromotedVT.getSizeInBits());
           break;
         }