[PATCH] D67493: [RISCV] Move DebugLoc Copy into CompressInstEmitter

[Sam Elliott via Phabricator via llvm-commits]

lenary updated this revision to Diff 232875.
lenary added a comment.
Herald added a subscriber: sameer.abuasal.

Rebased and added a test to ensure debug info is preserved.

The test doesn't actually fail without this patch, but this ensures it won't
fail in future.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67493/new/

https://reviews.llvm.org/D67493

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/test/MC/RISCV/compress-debug-info.s
  llvm/utils/TableGen/RISCVCompressInstEmitter.cpp


Index: llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
===================================================================
--- llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
+++ llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
@@ -728,6 +728,7 @@
       }
       ++OpNo;
     }
+    CodeStream.indent(6) << "OutInst.setLoc(MI.getLoc());\n";
     CaseStream << mergeCondAndCode(CondStream, CodeStream);
     PrevOp = CurOp;
   }
Index: llvm/test/MC/RISCV/compress-debug-info.s
===================================================================
--- /dev/null
+++ llvm/test/MC/RISCV/compress-debug-info.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple riscv32 -mattr=+c %s -g -o - -riscv-no-aliases \
+# RUN:   | FileCheck %s -check-prefixes=COMPRESS,BOTH
+# RUN: llvm-mc -triple riscv32 %s -g -o - -riscv-no-aliases \
+# RUN:   | FileCheck %s -check-prefixes=UNCOMPRESS,BOTH
+
+
+# This file ensures that compressing an instruction preserves its debug info.
+
+
+# BOTH-LABEL: .text
+
+# BOTH: .file 1
+# BOTH-SAME: "compress-debug-info.s"
+
+# BOTH:            .loc 1 [[# @LINE + 3 ]] 0
+# UNCOMPRESS-NEXT: addi a0, a1, 0
+# COMPRESS-NEXT:   c.mv a0, a1
+addi a0, a1, 0
+
+# BOTH-LABEL: .debug_info
Index: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
===================================================================
--- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -1596,7 +1596,6 @@
 void RISCVAsmParser::emitToStreamer(MCStreamer &S, const MCInst &Inst) {
   MCInst CInst;
   bool Res = compressInst(CInst, Inst, getSTI(), S.getContext());
-  CInst.setLoc(Inst.getLoc());
   S.EmitInstruction((Res ? CInst : Inst), getSTI());
 }
 


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