[PATCH] D68685: [RISCV] Scheduler description for Rocket Core

[Jim Lin via Phabricator via llvm-commits]

Jim added a comment.

A few nits.
LLVM prefers spaces to tabs.



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Comment at: llvm/lib/Target/RISCV/RISCV.td:91
 include "RISCVRegisterBanks.td"
-
 //===----------------------------------------------------------------------===//
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:445
+def FENCE_TSO : RVInstI<0b000, OPC_MISC_MEM, (outs), (ins), "fence.tso", "">,
+    	      	Sched<[WriteFence]> {
   let rs1 = 0;
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indentation with tabs.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:452
+def FENCE_I : RVInstI<0b001, OPC_MISC_MEM, (outs), (ins), "fence.i", "">,
+    	      Sched<[WriteFence]> {
   let rs1 = 0;
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indentation with tabs.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:465
+def EBREAK : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "ebreak", "">,
+    	     Sched<[]> {
   let rs1 = 0;
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indentation with tabs.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:475
+def UNIMP : RVInstI<0b001, OPC_SYSTEM, (outs), (ins), "unimp", "">,
+    	    Sched<[]> {
   let rs1 = 0;
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indentation with tabs.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:941
+                         PseudoInstExpansion<(JALR X1, GPR:$rs1, 0)>,
+			 Sched<[WriteJalr]>;
 
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indentation with tabs.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:946
+                PseudoInstExpansion<(JALR X0, X1, 0)>,
+		Sched<[WriteJalr]>;
 
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indentation with tabs.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:961
+                         PseudoInstExpansion<(JALR X0, GPR:$rs1, 0)>,
+			 Sched<[WriteJalr]>;
 
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indentation with tabs.


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  https://reviews.llvm.org/D68685/new/

https://reviews.llvm.org/D68685