[llvm] caabb71 - [ModuloSchedule] Fix data types in ModuloScheduleExpander::isLoopCarried

[Thomas Raoux via llvm-commits]

Author: Thomas Raoux
Date: 2019-12-09T07:37:00-08:00
New Revision: caabb713ea157f8c449c8d3eb00410bbef734a22

URL: https://github.com/llvm/llvm-project/commit/caabb713ea157f8c449c8d3eb00410bbef734a22
DIFF: https://github.com/llvm/llvm-project/commit/caabb713ea157f8c449c8d3eb00410bbef734a22.diff

LOG: [ModuloSchedule] Fix data types in ModuloScheduleExpander::isLoopCarried

The cycle values in modulo scheduling results can be negative.
The result of ModuloSchedule::getCycle() must be received as an int type.

Patch by Masaki Arai!

Differential Revision: https://reviews.llvm.org/D71122

Added: 
    

Modified: 
    llvm/lib/CodeGen/ModuloSchedule.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp
index 097b836f4fb6..163e52d9199d 100644
--- a/llvm/lib/CodeGen/ModuloSchedule.cpp
+++ b/llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -1190,7 +1190,7 @@ void ModuloScheduleExpander::rewriteScheduledInstr(
 bool ModuloScheduleExpander::isLoopCarried(MachineInstr &Phi) {
   if (!Phi.isPHI())
     return false;
-  unsigned DefCycle = Schedule.getCycle(&Phi);
+  int DefCycle = Schedule.getCycle(&Phi);
   int DefStage = Schedule.getStage(&Phi);
 
   unsigned InitVal = 0;
@@ -1199,7 +1199,7 @@ bool ModuloScheduleExpander::isLoopCarried(MachineInstr &Phi) {
   MachineInstr *Use = MRI.getVRegDef(LoopVal);
   if (!Use || Use->isPHI())
     return true;
-  unsigned LoopCycle = Schedule.getCycle(Use);
+  int LoopCycle = Schedule.getCycle(Use);
   int LoopStage = Schedule.getStage(Use);
   return (LoopCycle > DefCycle) || (LoopStage <= DefStage);
 }