[PATCH] D70007: [Intrinsic] Add fixed point division intrinsics.

[Bevin Hansson via Phabricator via llvm-commits]

ebevhan marked an inline comment as done.
ebevhan added a comment.

I think I'd like someone who has more specialized SelectionDAG knowledge to come with some input as well, but it doesn't seem like anyone else is looking at the patch.



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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7168-7170
+    Quot = DAG.getSelect(dl, VT,
+                         DAG.getNode(ISD::AND, dl, BoolVT, RemZero, QuotNeg),
+                         Sub1, Quot);
----------------
leonardchan wrote:
> ebevhan wrote:
> > ebevhan wrote:
> > > leonardchan wrote:
> > > > There's a corner case here where there won't be a subtraction if the true value of a division is between -1 and 0. For `-6 / 7`, the remainder will be non-zero, but quotient will be zero since sdiv rounds towards zero.
> > > > 
> > > > I think you need to instead check if only one of the signs of either operand is negative to check if the quotient is negative:
> > > > 
> > > > ```
> > > >     SDValue LHSNeg = DAG.getSetCC(dl, BoolVT, LHS, Zero, ISD::SETLT);
> > > >     SDValue RHSNeg = DAG.getSetCC(dl, BoolVT, RHS, Zero, ISD::SETLT);
> > > >     SDValue QuotNeg = DAG.getNode(ISD::XOR, dl, BoolVT, LHSNeg, RHSNeg);
> > > > ```
> > > Yep, I see what you mean.
> > Though, would it also work to check if the Remainder is negative instead of nonzero?
> Hmm I don't think that would work since `srem` of 2 negative numbers would return a negative number: `srem -7, -3 == -1`
Ah, that's true.


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https://reviews.llvm.org/D70007